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chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 1 / 16 specifications subject to change without notice united monolithic semiconductors s.a.s. bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 5.5 - 9ghz integrated down converter gaas monolithic microwave ic in smd leadless package description the chr3762 - qdg is a m ultifunction monolithic receiver , which integrate s a balanced cold fet mixer, a lo buffer, and a rf low noise amplifier . it is designed for a wide range of applications, from military to commercial communication systems. the circuit is manufactured with a phemt process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it i s supplied in rohs compliant smd package. main features conversion g ain & noise figure versus rf frequency @ if = 1ghz ( l sb mode) main electrical characteristics tamb. = + 25c symbol parameter min typ max unit f rf rf frequenc y 5 . 5 9 . 0 ghz f i f if frequency dc 3.5 ghz g conversion gain 14 db nf noise figure 1 .7 db ums r3762 yyww ? ? 0 2 4 6 8 10 12 14 16 18 20 4 4,5 5 5,5 6 6,5 7 7,5 8 8,5 9 9,5 10 10,5 11 conversion gain & noise figure (db) frequency (ghz) conversion gain nf ums a3667a yywwg ums a3667a yywwg ums a3688a yywwg ums a3667a yywwg ums a3667a yywwg ums a3688a yywwg
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 2 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 electrical characteristics tamb. = + 25c , vd1 = vd2 = vd3 = + 3 . 0 v (1) symbol parameter min typ max unit f rf rf frequency range 5 . 5 9 . 0 ghz f lo lo frequency range 4.0 12.0 ghz f if if frequency range dc 3.5 ghz g conversion gain (2) 14 db nf noise figure 1.7 db im_rej image rejection (2) 15 dbc p lo lo input power 5 dbm iip3 input ip3 3 dbm lo rl lo return loss 12 db rf rl rf return loss 9 db vd x dc drain voltage 3 v vg 1 1 st stage lna dc gate voltage - 0.45 v vg2 2 nd stage lna dc gate voltage - 0.35 v vg3 lo buffer dc gate voltage - 0.45 v vg4 mixer dc gate voltage - 1 v i d total d rain current (id1+id2+id3) (3) 100 ma these values are representative of onboard measurements as defined on the drawing in paragraph "evaluation mother board". (1) vd 1 : 1 st stage lna drain bias voltage. vd2: 2 nd stage lna drain bias voltage. (1) vd3: lo - chain drain bias voltage. (2) an external combiner 90 is required on i / q. (3) i d1 : 1 st stage lna drain current, typically 1 7 ma, should be tuned with vg 1 . (3) i d2 : 2 nd stage lna drain current, typically 45ma, should be tuned with vg2. (3) id3: lo - chain drain current, typically 38ma, should be tuned with vg3. electrostatic discharge sensitive device observe handling precautions!
5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 3 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 absolute maximum ratings (1) tamb.= + 25c symbol parameter values unit v d drain bias voltage 3.5 v id drain bias current 1 5 0 ma v g1 ,vg2 1 st stage lna gate bias voltages - 2 to +0.4 v vg3 lo buffer gate bias voltage - 2 to +0.4 v vg4 mixer gate bias voltage - 2 to +0.4 v p_rf maximum peak input power overdrive (2) +15 dbm p_lo maximum lo input power +10 dbm tj junction temperatur e 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +150 c (1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s . typical bias conditions tamb.= + 25c symbol pad n o parameter values unit v d x 13,15,18 dc drain voltages 3 v id 13,15,18 total d rain current 100 ma vg1 12 1 st stage lna dc gate voltage - 0.45 v vg2 14 2 nd stage lna dc gate voltage - 0.35 v vg3 17 lo buffer dc gate voltage - 0.45 v vg4 19 mixer dc gate voltage - 1 v
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 4 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 device thermal performances all the figures given in this section are obtained assuming that the qfn device is cooled down only by conduction through the package thermal pad (no convection mode considered). the temperature is monitored at the package back - side interface (tcase) as shown below. the system maximum temperat ure must be adjusted in order to guarantee that tcase remains below the maximum value specified in the next table. so, the pcb system must be designed to comply with this requirement. a derating must be applied on the dissipated power if the tcase tempera ture can not be maintained below the maximum temperature specified (see the curve pdiss. max) in order to guarantee the nominal device life time (mttf). recommended max. junction temperature (tj max) : 131 c junction temperature absolute maximum rating : 175 c max. continuous dissipated power (pdiss. max.) : 0,3 w => pdiss. max. derating above tcase (1) = 85 c : 5 mw/c junction-case thermal resistance (rth j-c) (2) : <183 c/w minimum tcase operating temperature (3) : -40 c maximum tcase operating temperature (3) : 85 c minimum storage temperature : -55 c maximum storage temperature : 150 c (1) derating at junctio n temperature co nstant = tj max. (2) rth j-c is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the m m ic and all the devices biased. (3) tcase=p ackage back side temperature measured under the die-attach-pad (see the drawing belo w). 6.1 device thermal specification : chr3762-qdg 0 0,05 0,1 0,15 0,2 0,25 0,3 - 50 - 25 0 25 50 75 100 125 150 pdiss. max. @tj 5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 5 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, vd1 = vd2 = vd3= +3 v , vg1 = - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v, p_lo = +5dbm these values are representative of onboard measurements as defined on the drawing in paragraph "evaluation mother board". data are given in the package access planes. conversion gain versus rf & lo power at if = 1ghz (usb mode) conversion gain versus if frequency at lo = 8ghz ( usb & lsb mode s ) 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 5 5,5 6 6,5 7 7,5 8 8,5 9 9,5 10 conversion gain (db) rf frequency (ghz) p_lo = 7dbm p_lo = 5dbm p_lo = 3dbm p_lo = 0dbm 0 2 4 6 8 10 12 14 16 18 20 1 1,5 2 2,5 3 3,5 conversion gain (db) if frequency (ghz) lsb usb
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 6 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, p_lo = +5dbm vd1=vd2=vd3=+3v and vg1= - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v noise figure versus rf frequency at if = 1ghz (usb & lsb mode s ) input ip3 versus lo power at rf = 7.5 ghz & if = 2ghz (usb mode) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 5,5 6 4 4,5 5 5,5 6 6,5 7 7,5 8 8,5 9 9,5 10 10,5 11 noise figure (db) frequency (ghz) usb inf - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 - 27 - 26 - 25 - 24 - 23 - 22 - 21 - 20 - 19 - 18 - 17 - 16 - 15 - 14 - 13 - 12 input ip3 (dbm) input power dcl (dbm) p_lo = 7dbm p_lo = 5dbm p_lo = 3dbm p_lo = 0dbm
5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 7 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, p_lo = +5dbm vd1=vd2=vd3=+3v and vg1= - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v image rejection versus if at lo = 8 ghz ( usb & l sb mode s ) return losses (lo & rf) versus frequency 0 5 10 15 20 25 30 35 40 1 1,5 2 2,5 3 3,5 image rejection (dbc) if frequency (ghz) lsb usb - 20 - 18 - 16 - 14 - 12 - 10 - 8 - 6 - 4 - 2 0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 lo & rf return losses (db) frequency (ghz) rf lo
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 8 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, p_lo = +5dbm vd1=vd2=vd3=+3v and vg1= - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v input ip3 vs rf frequency at if = 1ghz (lsb mode C i nput ip 3 vs rf frequency & dc biasing, at if = 1ghz (lsb mode C input ip3 vs rf frequency at if = 1ghz (u sb mode C input ip 3 vs rf frequency & dc biasing, at if = 1ghz ( u sb mode C - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 - 28 - 27 - 26 - 25 - 24 - 23 - 22 - 21 - 20 - 19 - 18 - 17 - 16 - 15 - 14 input ip3 (dbm) input power dcl (dbm) rf = 8.5ghz rf = 7ghz rf = 5.8ghz - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 5,5 6 6,5 7 7,5 8 8,5 9 input ip3 (dbm) frequency (ghz) 115 ma 100 ma 90 ma - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 - 28 - 27 - 26 - 25 - 24 - 23 - 22 - 21 - 20 - 19 - 18 - 17 - 16 - 15 - 14 input ip3 (dbm) input power dcl (dbm) rf = 8.5ghz rf = 7ghz rf = 5.8ghz - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 5,5 6 6,5 7 7,5 8 8,5 9 input ip3 (dbm) frequency (ghz) 115 ma 100 ma 90 ma
5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 9 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, p_lo = +5dbm vd1=vd2=vd3=+3v and vg1= - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v conversion gain versus temperature at if = 1ghz ( l sb mode) noise figure versus temperature at if = 1ghz (lsb mode) 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 4 4,5 5 5,5 6 6,5 7 7,5 8 8,5 9 9,5 10 10,5 11 conversion gain (db) rf frequency (ghz) - 40 c +25 c +85 c 0 0,5 1 1,5 2 2,5 3 3,5 4 4 4,5 5 5,5 6 6,5 7 7,5 8 8,5 9 9,5 10 10,5 11 noise figure (db) frequency (ghz) +85 c +25 c - 40 c
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 10 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, p_lo = +5dbm vd1=vd2=vd3=+3v and vg1= - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v input ip3 vs temperature at if = 1ghz (lsb mode C imd3 vs temperature at if = 1ghz (lsb mode C input ip3 vs temperature at if = 1ghz (u sb mode C imd3 vs temperature at if = 1ghz ( u sb mode C - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 5,5 6 6,5 7 7,5 8 8,5 9 input ip3 (dbm) frequency (ghz) - 40 c +25 c +85 c 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 - 28 - 27 - 26 - 25 - 24 - 23 - 22 - 21 - 20 - 19 - 18 - 17 - 16 - 15 - 14 imd3 (dbm) input power dcl (dbm) - 40 c +25 c +85 c - 2 - 1 0 1 2 3 4 5 6 7 8 9 10 5,5 6 6,5 7 7,5 8 8,5 9 input ip3 (dbm) frequency (ghz) - 40 c +25 c +85 c 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 - 28 - 27 - 26 - 25 - 24 - 23 - 22 - 21 - 20 - 19 - 18 - 17 - 16 - 15 - 14 imd3 (dbc) input power dcl (dbm) - 40 c +25 c +85 c
5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 11 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical board measurements tamb.= +25c, p_lo = +5dbm vd1=vd2=vd3=+3v and vg1= - 0.45v, vg2= - 0.35v, vg3= - 0.45v, vg4= - 1v spurious on if outputs rf = lo + if p_rf = - 20dbm @ 8.5ghz / p_lo = 0dbm @ 7.5ghz all values in dbc below if power level (if = 1ghz). data measured without external hybrid coupler. mrf 0 1 2 3 4 0 xx 14 32 40 45 1 19 0 39 56 47 2 77 70 34 52 67 3 <-90 <-90 <-90 61 68 4 <-90 <-90 <-90 <-90 <-90 nlo
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 12 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 package outline (1) matt tin, lead free (green) 1 - nc 9 - rf in 17 - vg4 units : mm 2 - if_ q 10 - gnd (2) 18 - vd3 from the standard : jedec mo - 220 3 - gnd (2) 11 - nc 19 - vg3 (vggd) 4 - gnd (2) 12 - vg1 20 - nc 25 - gnd 5 - if_ i 13 - vd1 21 - gnd (2) 6 - nc 14 - vg2 22 - lo in 7 - nc 15 - vd2 23 - gnd (2) 8 - gnd (2) 16 - nc 24 - nc (1) the package outline drawing included in this data - sheet is given for indication. refer to the application note an0017 ( http://www.ums - gaas.com ) for exact package dimensions. (2) it is strongly recommended to ground all pins marked gnd through the pcb board.
5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 13 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 evaluation mother board
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 14 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 notes esd protections are implemented on gate dc bias accesses. the dc connections do not include any decoupling capacitor in package, therefore it is mandatory to provide a good external dc decoupling ( 100pf + 10nf) on the pc board, as close as possible to the package. 1 3 4 2 6 5 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 nc if_q gnd gnd if_i nc vd3 vg4 nc vd2 vg2 vd1 nc gnd lo in gnd nc vg3 nc gnd rf in gnd nc vg1
5.5 - 9ghz integrated down converter chr3762 - qdg ref. : dschr3762 - qdg2335 - 30 nov 12 15 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 dc schematic lna: 3 v, 62 ma lo buffer: 3 v, 38 ma vd3 = 3v 1 k w vg3 # - 0.45v 49.5ma 19ma 49.5ma 19ma 70 w 49.5ma 300 w w 1 k w x3 1 k w w w vd2 = 3 v vd1 = 3v 45ma 55 w x3 x3 x3 1 k x3 x3 x3 vg1 # - 0.45v vg2 # - 0.35v 49.5ma 17ma
chr3762 - qdg 5.5 - 9ghz integrated down converter ref. : dschr3762 - qdg2335 - 30 nov 12 16 / 16 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended package footprint refer to the application note an0017 available at http://www.ums - gaas.com for package foot print recommendations. smd mounting procedure for the mounting process standard techniques involving solder paste and a suit able reflow process can be used. for further details, see application note an0017. recommended environmental management ums products are compliant with the regulation in particular with the directives rohs n2011/65 and reach n1907/2006. more environme ntal data are available in the application note an0019 also available at http://www.ums - gaas.com . recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums package products. ordering information qfn 4x4 package: chr3762 - qdg /xy stick: xy = 20 tape & reel: xy = 21 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in thi s publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.

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